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Adaptive Quantum Circuits

AQC26 Recorded Talks

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Dr. Eyob A. Sete

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Dr. Eyob A. Sete

Scaling Chiplet-Based Superconducting Quantum Processors Toward Fault Tolerance

Abstract

Realizing large-scale, fault-tolerant quantum computation requires architectures that are both modular and manufacturable at scale. In this talk, I will present a scalable chiplet-based superconducting quantum processor architecture that leverages modularity to overcome the fabrication and yield challenges inherent in monolithic designs. Our approach utilizes floating tunable couplers to interconnect chiplets, enabling strong and flexible coupling between qubits distributed across separate dies. These couplers are mediated through a secondary wafer that integrates shared infrastructure for readout feedlines and control wiring, simplifying packaging and improving signal integrity.

By partitioning the quantum processor into independently tested chiplet unit cells, we achieve higher overall yield and design flexibility, since only high-performing chiplets are assembled into the final array. To further optimize system performance, we introduce an alternative biased annealing technique that compensates for post-fabrication frequency deviations in superconducting qubits. This process effectively tunes the qubit frequencies toward their design targets, resulting in high-fidelity entangling gates and improved device uniformity across the multi-chip platform.

I will also discuss the performance of our deployed Cepheus-1-36Q and 108Q processors, highlighting their current gate performance and the dominant factors limiting logical-gate fidelities. These results provide insight into the remaining hardware and control challenges that must be addressed as the architecture is scaled toward fault-tolerant operation.

Together, these advances establish a practical path toward scalable, high-yield superconducting quantum processors. By combining chiplet modularity, tunable interconnects, post-fabrication frequency correction, and system-level performance analysis, this architecture provides a flexible and manufacturable platform for scaling superconducting quantum systems toward fault-tolerant and utility-scale quantum computing.

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